Mid-Level SoC Design Engineer (ARM Architecture & Corestone Experience)

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Job Requisition: Mid-Level SoC Design Engineer (ARM Architecture & Corestone Experience)

Location: Hyderabad, India

Department: Hardware Engineering – SoC Design

Employment Type: Full-Time

About Azimuth AI

Azimuth AI is building next-generation AI compute platforms and silicon that deliver breakthrough performance, efficiency, and scalability. Our cross-functional hardware, software, and silicon teams collaborate closely to push the boundaries of edge and cloud AI acceleration. We are expanding our SoC Architecture & Design team in Hyderabad to support our rapidly growing AI silicon roadmap.

 

Role Overview

We are looking for a Mid-Level SoC Design Engineer with strong expertise in ARM architecture and hands-on experience working with Arm Corestone reference systems. The candidate will support subsystem design, integration, and optimization activities across Azimuth AI’s next-generation SoCs.

You will work with architecture, verification, and physical design teams to bring complex ARM-based subsystems to production-quality readiness.

 

Key Responsibilities

    • Design and integrate ARM-based subsystems derived from Arm Corestone reference packages into Azimuth AI SoCs.
    • Implement and modify RTL for CPU subsystems, AMBA interconnects, memory controllers, and peripheral IP.
    • Collaborate with architecture teams on feature definition, microarchitecture updates, and performance targets.
    • Work closely with verification teams to debug functional issues and ensure high-quality coverage closure.
    • Support synthesis, timing analysis, and physical design teams during SoC execution.
    • Drive documentation, design reviews, and bring-up support for early silicon and emulation platforms.
    • Contribute to methodology improvements for subsystem integration and design scalability.

    Required Qualifications

    • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
    • 6-8 years of experience in SoC or subsystem design.
    • Strong knowledge of ARM architecture, AMBA protocols (AXI, AHB, APB), and system-level integration.
    • Hands-on experience with Arm Corestone-based packages or similar ARM reference designs.
    • Proficiency in RTL design (SystemVerilog/Verilog) and SoC integration flows.
    • Strong debugging skills across simulation, lint, CDC, and synthesis environments.
    • Ability to collaborate in a fast-paced, cross-functional engineering environment.

    Preferred Qualifications

    • Knowledge of low-power design techniques and clock/power domain architecture.
    • B.Tech/M.Tech/BE/ME/M.Sc/M.S in Computer Science or Electronics/Electrical engineering
    • Familiarity with FPGA prototyping, emulation platforms, or early silicon bring-up.
    • Exposure to AI/ML accelerator-based SoCs is a plus.

    Why Join Azimuth AI

    • Work on cutting-edge silicon shaping the future of AI compute.
    • Collaborate with top-tier engineers in architecture, design, algorithms, and systems.
    • Opportunity to influence and architect foundational technologies in our AI SoC roadmap.
    • Competitive compensation, benefits, and rapid career growth.