Senior SoC Analog Design Engineer
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Job Requisition: Senior SoC Analog Design Engineer
Location: Hyderabad, India
Department: Hardware Engineering – SoC Design
Employment Type: Full-Time
About Azimuth AI
Azimuth AI is building next-generation AI compute platforms and silicon that deliver breakthrough performance, efficiency, and scalability. Our cross-functional hardware, software, and silicon teams collaborate closely to push the boundaries of edge and cloud AI acceleration. We are expanding our SoC Architecture & Design team in Hyderabad to support our rapidly growing AI silicon roadmap.
Role Overview
We are seeking a Senior SoC Analog Design Engineer with strong expertise. The role involves supporting design, integration, and optimization activities across Azimuth AI’s next-generation SoCs.
Looking for 10+ years of hands-on experience in highly integrated Ultra Deep Sub-Micron CMOS analog mixed signal design.
Key Responsibilities
- Will be involved in all stages of product development from product definition to trouble shooting production yield issues.
- Implement and modify Analog IPs.
- Collaborate with architecture teams on feature definition, microarchitecture updates, and performance targets.
- Contribute to methodology improvements for subsystem integration and design scalability.
- Will be an analog chip lead and be responsible for spec definition, IP design, behavioral models, Wreal models, DFT requirements definition, pad-ring design, wiring diagram, floorplan, design for reliability – ESD, latchup robustness, ensuring no floating nodes and no over-voltage issues.
Required Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
- 10+ years of experience in Analog Mixed signal design.
- Hands on design experience in analog IPs like PLLs, oscillators, bandgap, LDOs, IOs, Serdes, etc.
- Hands on experience in Analog top level simulations and AMS simulations.
- Hands on experience in engineering bench validation board design, bench validation, ATE test program support and debug.
- Experience with debugging silicon issues both IP level/System level and production yield issues.
- Experienced with ESD, latchup, HTOL, HAST teams to define the requirements and applications.
- Experience with failure analysis of issues reported from qual.
- Ability to collaborate in a fast-paced, cross-functional engineering environment.
Preferred Qualifications
- Knowledge of low-power design techniques.
- Exposure to AI/ML accelerator-based SoCs is a plus.
- Advanced degrees (B.Tech/M.Tech/BE/ME/M.Sc/M.S) in Computer Science or Electronics/Electrical Engineering.
Why Join Azimuth AI
- Work on cutting-edge silicon shaping the future of AI compute.
- Collaborate with top-tier engineers in architecture, design, algorithms, and systems.
- Opportunity to influence and architect foundational technologies in our AI SoC roadmap.
- Competitive compensation, benefits, and rapid career growth.